- Journal
- IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
- Année
- 2017
- Volume
- 64
- Numéro
- 12
- Pages
- 9487-9495
- Mois
- DEC
- DOI
- 10.1109/TIE.2017.2708028
Abstract
The Fuzzy ARTMAP is a supervised learning method, providing high accuracy in many classifications. In this paper, we explore the role of hardware accelerators in remote sensing classification missions. We focus on the designing and implementing a massively parallel hardware architecture on a field-programmable gate array (FPGA) of the performance phase's algorithm. The implementation is mapped on Xilinx Virtex 6 XC6VLX240T FPGA chip for an embedded system using Xilinx ISE 14.5 software. Embedded blocks dedicated to digital signal processing (DSP) and blocks memories are used. DSP48E1 is part of Virtex-6 FPGAs devices. It boasts of increased capability over previous generations, and is highly customizable, a key feature of this primitive that has motivated and enabled the work presented in this paper. We illustrate the application of this methodology to the valuation of various schemes involving embedded elements. This paper also presents a summary of the performance cost with regard to the speed, power, and required computational resources.